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The Design Challenges of RF SIPs and Multi Chip Modules

February 10, 2010
Malcolm Edwards, AWR Corp.

RF SiP and MCMs integrate CMOS integrated circuits (ICs) for digital circuits and GaAs or SiGe devices for RF and microwave circuits with soft-board laminates and LTCC packages. Software used to design these complex circuits must seamlessly bring together synthesis, simulation, and verification solutions via a single interface ensure optimum component design and placement in each technology.

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RF system-in-package (SiP) and multi-chip-module (MCM) designs present engineers with the challenge of integrating complementary metal oxide semiconductor (CMOS) integrated circuits (ICs) for digital circuits and gallium arsenide (GaAs) or silicon germanium (SiGe) devices for RF and microwave circuits with soft-board laminates and low-temperature co-fi red ceramic (LTCC) packages. Software used to design these complex circuits must seamlessly bring together synthesis, simulation, and verifi cation solutions via a single interface in order to ensure optimum component design and placement in each technology. It must also construct schematics and perform physical design entry for any technology in the SiP using uniform commands and menu options. Unfortunately, this is not usually what the designer experiences, and it is not uncommon for an engineer to design a GaAs chip using one set of IC design tools, Si and SiGe chips with another, and then to integrate both using LTCC or multilayer laminate designed using a printed circuit board (PCB) tool. The architecture of the AWR Design Environment™ (AWRDE) / Microwave Offi ce® software provides the ideal solution to this disjointed approach (Figure 1) by incorporating all of the tools necessary for the design of these complex multi-technology devices within a simple yet comprehensive user interface, enabling faster and more accurate designs from concept through to the system level.

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