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Recent advances in mobile phone RF modules have been made for the miniaturization and integration of components in such a manner that they can address all of the global standards. The stringent specifications for the different systems have to be met using inexpensive surface-mount plastic modules, which integrate diverse functionality with just a few chips. In addition, the module needs to perform over a wide frequency band in the smallest possible layout space. In the GSM arena, the trend has been towards evolving a GSM mobile phone that supports all the four major GSM frequency bands in a single handset, making it compatible with all the major GSM networks worldwide.1,2

Worldwide GSM has four bands: GSM 850 MHz and GSM 1900 MHz (Personal Communication Services, PCS) bands are used in America, while GSM 900 MHz and GSM 1800 MHz (Digital Cellular Services, DCS) bands are used in Europe and elsewhere in the world. The quad-band GSM mobile handset requires power amplifiers that meet stringent harmonic rejection at the specified output power with the maximum power-added efficiency (PAE) possible. The FCC’s harmonic rejection specifications require that the output power level at harmonics be less than –30 dBm for all nf0, where n ? 2 and f0 is the fundamental frequency of transmission. At the low GSM band (GSM 800/950 MHz), the specified output power is 33 dBm, thus requiring better than –63 dBc rejection, while at the high GSM band (GSM 1800/1900 MHz), the specified power is 31 dBm, requiring better than –61 dBc rejection. Traditionally, the harmonic rejection is achieved by employing an output impedance matching circuit followed by a harmonic-rejection filter. SAW filters are being used since they are small, with low insertion loss, and can provide the required rejection. However, SAW filters are expensive and not easy to incorporate in the module. Using high Q passive substrates, the best figures reported are –40 to –49 dBc for second- and third-harmonic filters.3,4 The disadvantages of using independent circuits for matching and filtering are two-fold: greater insertion loss due to a larger number of elements and thus the requirement for larger chip area. However, to design an optimal low pass circuit with the highest possible harmonic rejection is a theoretically challenging problem.5 It becomes more challenging if there are implementation constraints such as layout size, which is driven by today’s cost requirements. The design challenges are further aggravated by the impedance matching transformation ratio (of the order of 20 to 50) required to match high power amplifiers to a 50 ? load.