An Efficient, Interactive Optimization Solution for Analog and RF Design

Optimization has been applied to circuit design for decades. IBM pioneered circuit simulation-based optimizer research in the 1960s and ’70s. In the 1980s, the University of California at Berkeley extended the research with more exotic algorithms and interactivity with programs such as DELIGHT and ECSTACY. During the same period, AT&T Bell Labs, using a program called TILOS, used optimization for transistor sizing of custom digital circuits in order to improve timing performance. Today, optimization products can be obtained from most major electronic design automation (EDA) providers.

Microwave designers have traditionally applied optimization widely to improve and center the performance of their circuits. However, even though optimization has long been an established workhorse for microwave designers, its application in analog integrated circuit (IC) design has been hampered by poor ease-of-use and performance. This tutorial describes a fast, easy to use and highly interactive optimization solution that is very effective for analog and RF/microwave applications.

As opposed to some circuit optimizers on the market that require tedious setup and run mostly in a batch mode, the solution described in this article is designed for easy setup and interactive use during the circuit design creation process. While many solutions offer just one algorithm, this one offers a number of different optimization algorithms and methods that can be applied depending upon the problem definition and breadth of the design space to be explored. Many of these algorithms begin at a user-defined starting point and search the design space from that point to find the local optimum. Some, like Genetic and Pointer, can search the entire design space to find the global optimum. These particular algorithms can even handle discrete component and sub-circuit choices that can be used to synthesize circuit structure. Some of the unique and powerful features of this optimization solution are demonstrated in the following example. A list and descriptions of all the algorithms included are shown in Appendix A.