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October 2006 Issue: Technical Feature

A Practical Design of a Low Phase Noise Airborne X-band Frequency Synthesizer

Frequency synthesizers have been well studied, but difficult problems sometimes arise in their practical implementations. The major concern of synthesizer designers is the phase noise. It is critically important in Doppler radar, frequency-agile radar and various communications systems. In such applications, a synthesizer’s phase noise may set the system’s limits for dynamic range and reception sensitivity. The choice of an optimal architecture for minimum phase noise, rejection of spurs from different sources, and achieving high efficiency and small volume are the key steps in an airborne synthesizer design. This article describes the design of a frequency synthesizer with the following performance:


  • The frequency varies from 8.9 to 9.3 GHz in steps of 20 MHz.

  • The phase noise is –80 dBc/Hz at 100 Hz and –97 dBc/Hz at 10 to 600 kHz frequency offset.

  • The synthesizer must use a 100 MHz reference with a phase noise of –115 dBc/Hz at 100 Hz.

  • The switching time is 20 μs to reach the frequency with an error less than 1 ppm.

  • The level of spurs is less than –64 dBc in the bandwidth from 10 MHz to the second harmonic of the output signal.

  • The level of the second harmonic is –48 dBc and the level of the third harmonic is –55 dBc.

  • The output power is +13 dBm and the power consumption is 2.3 W with a 12 V power supply.

  • The volume is 250 cm3 and the weight 470 grams.

Voltage-controlled Oscillator (VCO) Phase Noise Analysis: Choice of the VCO Band

A synthesizer consists of a voltage-controlled oscillator (VCO), a phase-locked loop (PLL) circuit and a reference signal source. The upper limit of a PLL IC frequency band is lower than the desired output frequency band, covering only half of it. There are two different ways to design a synthesizer—use a VCO at half the output frequency to produce the input signal to the PLL and then double it or use a VCO at the output frequency and then divide by 2 to produce the input signal to the PLL. The phase noise performance of the VCO is the main criterion to choose the best approach. The VCO phase noise is described by the Leeson equation

where

fOS = frequency offset (Hz)
F0 = oscillation frequency (Hz)
QL = loaded Q of the resonator circuit with an equivalent noise resistance R
fC = flicker corner frequency of the active device used as the amplifying element (Hz)
F = noise figure of the active device
k = Boltzmann’s constant, 1.38 10–21 (J/K)
T = temperature (Kelvin)
PS = average power of the signal at the input of active device (W)
K0 = oscillator voltage tuning gain (Hz/V)


     

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